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extern module and("and.sch"); # a kicad schematic in the same directory which defines some input/output signals and wires them together in some way
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extern module or("or.sch"); # same thing, but for or
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extern module xor("xor.sch");
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# a binary half adder
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module half_adder(input a, input b, output sum, output carryOut)
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{
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xor(a, b, sum);
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and(a, b, carryOut);
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}
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# a binary full adder
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module full_adder(input a, input b, input carryIn, output sum, output carryOut)
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{
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signal sum1;
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signal carry1;
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signal carry2;
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half_adder(a, b, sum1, carry1);
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half_adder(sum1, carryIn, sum, carry2);
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or(carry1, carry2, carryOut);
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}
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# a byte full adder
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# takes in busses(arrays of signals)
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module byte_adder(input A[0:8], input B[0:8], input carryIn, output Sum[0:8], output carryOut)
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{
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signal Carries[0:7];
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full_adder(A[0], B[0], carryIn, Sum[0], Carries[0]);
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full_adder(A[1], B[1], Carries[0], Sum[1], Carries[1]);
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full_adder(A[2], B[2], Carries[1], Sum[2], Carries[2]);
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full_adder(A[3], B[3], Carries[2], Sum[3], Carries[3]);
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full_adder(A[4], B[4], Carries[3], Sum[4], Carries[4]);
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full_adder(A[5], B[5], Carries[4], Sum[5], Carries[5]);
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full_adder(A[6], B[6], Carries[5], Sum[6], Carries[6]);
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full_adder(A[7], B[7], Carries[6], Sum[7], carryOut);
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}
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# this is what gets converted into a schematic
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# it's just a re-export of the byte adder.
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module main(input A[0:8], input B[0:8], input cIn, output Sum[0:8], output cOut)
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{
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byte_adder(A, B, cIn, Sum, cOut);
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}
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# tests (TODO)
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# we need to define how and, or, xor work
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# compiler will look at the signals to figure out what are inputs and what are outputs
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## expect and(0, 0, 0);
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## expect and(0, 1, 0);
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## expect and(1, 0, 0);
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## expect and(1, 1, 1); # can also write `expect and(HIGH, HIGH, HIGH)` - HIGH = 1 and LOW = 0; The compiler doesn't care
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## test "adder works" # start with "test", then the name of the test case
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## {
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## signal Sum[0:7];
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## signal cOut;
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## # numbers are automatically converted into bus values
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## byte_adder(2, 3, LOW, Sum, cOut);
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## assert_equal(5, Sum);
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## assert_equal(LOW, cOut);
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## }
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